Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

Name: Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs
Brand: Springer Nature
SKU: 9783319023779
Availability: InStock

Best Price (Coupon Required):
Buy Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs for $76.50 at @ Link.springer.com when you apply the 10% OFF coupon at checkout.
Click “Get Coupon & Buy” to copy the code and unlock the deal.

Set a price drop alert to never miss an offer.

1 Offer Price Range: $84.99 - $84.99

BEST PRICE

Single Product Purchase

$76.50

@ Link.springer.com with extra coupon

Price Comparison

Seller	Contact Seller	List Price	On Sale	Shipping	Best Promo	Final Price	Volume Discount	Financing	Availability	Seller's Page
BEST PRICE 1 Product Purchase @ Link.springer.com		$84.99	$84.99		10% OFF This deals requires coupon	$76.50		See Site	In stock	Visit Store

Product Details

Brand

Springer Nature

Manufacturer

N/A

Part Number

GTIN

9783319023779

Condition

New

Product Description

This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.

Available Colors

N/A

Available Sizes

N/A